1. Field
Circuit processing.
2. Background
Advanced circuit structures demand precision in the processing techniques that are used to form them. Advanced transistor structures, for example, require precisely doped semiconductor (e.g., silicon) layers that may serve, for example, as source/drain regions, tips, and channels. As device (e.g., transistor) geometries shrink, these layers become thinner and the composition of the layer must increasingly be more carefully controlled. Ion implantation remains one of the leading techniques to dope silicon, but as layers becomes thinner, ion implantation lacks the precision to dope some of the more delicate structures. In terms of depositing semiconductor layers, epitaxial deposition is often used. Doping of epitaxial layers may be accomplished by ion implantation or by separately introducing a semiconductor precursor and a doping precursor in the formation of the epitaxial layer.
In addition to electrically active layers such as described above, integrated circuits use dielectric layers to isolate individual devices on a chip. These dielectric materials include materials such as silicon dioxide (SiO2), phosphosilicate glass (PSG), silicon carbide (SiC), fluorinated silicate glass (FSG), and carbon doped oxide (CDO). A dielectric material is selected in one regard for its dielectric properties as well as its parasitic capacitance. As the parasitic capacitance is reduced, the cross-talk (e.g., a characterization of the electric field between adjacent interconnections) is reduced, as is the resistance-capacitance (RC) time delay and power consumption (e.g., with respect to signals conducted along interconnections). The property of a dielectric material, notably its dielectric constant, may be altered by dopants or changes in porosity. Thus, the ability to precisely control a dopant concentration and/or porosity within a layer becomes critical as circuit performance is maximized for semiconductor and dielectric materials.